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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-07-13 08:51:57 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-07-13 08:51:57 +0000 |
| commit | faee91a52b3aa2be2f4cb488c0dddc8965431d96 (patch) | |
| tree | a975c41787790f4914ed3ea943cafccae480f161 /llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | |
| parent | be2e80af12fea50a37bda96a22d96894ef5eb5e3 (diff) | |
| download | bcm5719-llvm-faee91a52b3aa2be2f4cb488c0dddc8965431d96.tar.gz bcm5719-llvm-faee91a52b3aa2be2f4cb488c0dddc8965431d96.zip | |
[AArch64][SVE] Asm: Support for insert element (INSR) instructions.
Insert general purpose register into shifted vector, e.g.
insr z0.s, w0
insr z0.d, x0
Insert SIMD&FP scalar register into shifted vector, e.g.
insr z0.b, b0
insr z0.h, h0
insr z0.s, s0
insr z0.d, d0
llvm-svn: 336979
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp')
0 files changed, 0 insertions, 0 deletions
