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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2018-11-28 12:00:20 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2018-11-28 12:00:20 +0000 |
| commit | d7eebd6d831fa80c3840f10120c235db65f650da (patch) | |
| tree | 367e04b77cabbb887e7e18a20c86dc0f6245af2b /llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | |
| parent | dda6290f16075795a5700c29d1b990fff8e1261b (diff) | |
| download | bcm5719-llvm-d7eebd6d831fa80c3840f10120c235db65f650da.tar.gz bcm5719-llvm-d7eebd6d831fa80c3840f10120c235db65f650da.zip | |
[CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operand
Currently, instructions doing memory accesses through a base operand that is
not a register can not be analyzed using `TII::getMemOpBaseRegImmOfs`.
This means that functions such as `TII::shouldClusterMemOps` will bail
out on instructions using an FI as a base instead of a register.
The goal of this patch is to refactor all this to return a base
operand instead of a base register.
Then in a separate patch, I will add FI support to the mem op clustering
in the MachineScheduler.
Differential Revision: https://reviews.llvm.org/D54846
llvm-svn: 347746
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp')
0 files changed, 0 insertions, 0 deletions
