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| author | Ashutosh Nema <ashu1212@gmail.com> | 2017-08-31 12:38:35 +0000 |
|---|---|---|
| committer | Ashutosh Nema <ashu1212@gmail.com> | 2017-08-31 12:38:35 +0000 |
| commit | bfcac0b4806ad528c93a65281d7eb0d5f66305e9 (patch) | |
| tree | 76aa60776bceeab42df6dead6eb58005ee17e8b7 /llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | |
| parent | 23a86ea4b4399c651df88bcb7b18a4f7cb7b183f (diff) | |
| download | bcm5719-llvm-bfcac0b4806ad528c93a65281d7eb0d5f66305e9.tar.gz bcm5719-llvm-bfcac0b4806ad528c93a65281d7eb0d5f66305e9.zip | |
AMD family 17h (znver1) scheduler model update.
Summary:
This patch enables the following:
1) Regex based Instruction itineraries for integer instructions.
2) The instructions are grouped as per the nature of the instructions
(move, arithmetic, logic, Misc, Control Transfer).
3) FP instructions and their itineraries are added which includes values
for SSE4A, BMI, BMI2 and SHA instructions.
Patch by Ganesh Gopalasubramanian
Reviewers: RKSimon, craig.topper
Subscribers: vprasad, shivaram, ddibyend, andreadb, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D36617
llvm-svn: 312237
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp')
0 files changed, 0 insertions, 0 deletions
