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| author | Craig Topper <craig.topper@intel.com> | 2017-11-15 00:22:42 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-15 00:22:42 +0000 |
| commit | bf6495fbcbc29527c799d320d1f36a256798a095 (patch) | |
| tree | d5a16f71bb8362bc0c7bf933bb074b0ea662174e /llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | |
| parent | cff19ee2330f86e3f3cc320b89e928c97437b932 (diff) | |
| download | bcm5719-llvm-bf6495fbcbc29527c799d320d1f36a256798a095.tar.gz bcm5719-llvm-bf6495fbcbc29527c799d320d1f36a256798a095.zip | |
[LoopRotate] processLoop should return true even if it just simplified the loop latch without making any other changes
Simplifying a loop latch changes the IR and we need to make sure the pass manager knows to invalidate analysis passes if that happened.
PR35210 discovered a case where we failed to invalidate the post dominator tree after this simplification because we no changes other than simplifying the loop latch.
Fixes PR35210.
Differential Revision: https://reviews.llvm.org/D40035
llvm-svn: 318237
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp')
0 files changed, 0 insertions, 0 deletions
