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author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-06-06 15:10:47 +0000 |
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committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-06-06 15:10:47 +0000 |
commit | 8a7b4f18bd2266c5701d6b959673e118895a456a (patch) | |
tree | a56416d5a4e01b29c8d8293f129b5fb16603b7a7 /llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | |
parent | 62438dab83a3dc4eccedf8158d87b8da34304cfd (diff) | |
download | bcm5719-llvm-8a7b4f18bd2266c5701d6b959673e118895a456a.tar.gz bcm5719-llvm-8a7b4f18bd2266c5701d6b959673e118895a456a.zip |
[PPC64LE] Implement little-endian semantics for vec_pack family
The PowerPC vector-pack instructions are defined architecturally with
a big-endian bias, in that the vector element numbering is assumed to
be "left to right" regardless of whether the processor is in
big-endian or little-endian mode. This definition is unnatural for
little-endian code generation.
To facilitate ease of porting, the vec_pack and related interfaces are
designed to use natural element ordering, so that elements are
numbered according to little-endian design principles when code is
generated for a little-endian target. The vec_pack calls are
implemented as calls to vec_perm, specifying selection of the
odd-numbered vector elements. For little endian, this means the
odd-numbered elements counting from the right end of the register.
Since the underlying instructions count from the left end, we must
instead select the even-numbered vector elements for little endian to
achieve the desired semantics.
The correctness of this code is tested by the new pack.c test added in
a previous patch. I plan to later make the existing ppc32 Altivec
compile-time tests work for ppc64 and ppc64le as well.
llvm-svn: 210340
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp')
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