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authorSanjay Patel <spatel@rotateright.com>2018-10-30 14:14:34 +0000
committerSanjay Patel <spatel@rotateright.com>2018-10-30 14:14:34 +0000
commit8b207defeac47d7394cb1e68011b031729d77791 (patch)
tree6b6f220b1e4f0187c3a3167900b5eba74acc074c /llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
parentbd74554f540a20ef6d3a95e1cd38dd4593f53cb1 (diff)
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[DAGCombiner] narrow vector binops when extraction is cheap
Narrowing vector binops came up in the demanded bits discussion in D52912. I don't think we're going to be able to do this transform in IR as a canonicalization because of the risk of creating unsupported widths for vector ops, but we already have a DAG TLI hook to allow what I was hoping for: isExtractSubvectorCheap(). This is currently enabled for x86, ARM, and AArch64 (although only x86 has existing regression test diffs). This is artificially limited to not look through bitcasts because there are so many test diffs already, but that's marked with a TODO and is a small follow-up. Differential Revision: https://reviews.llvm.org/D53784 llvm-svn: 345602
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