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author | Gil Rapaport <gil.rapaport@intel.com> | 2019-10-07 17:24:33 +0300 |
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committer | Gil Rapaport <gil.rapaport@intel.com> | 2019-11-09 20:52:25 +0200 |
commit | 7f152543e4ff91f2ce8578a1b3b3ec18f580345a (patch) | |
tree | 86b37c58269972aef67db06f63a87ad66eabc766 /llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h | |
parent | 0ac296322f015f7d35d164d268a5949662f89ad0 (diff) | |
download | bcm5719-llvm-7f152543e4ff91f2ce8578a1b3b3ec18f580345a.tar.gz bcm5719-llvm-7f152543e4ff91f2ce8578a1b3b3ec18f580345a.zip |
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFCI)
This recommits 11ed1c0239fd51fd2f064311dc7725277ed0a994 (reverted in
9f08ce0d2197d4f163dfa4633eae2347ce8fc881 for failing an assert) with a fix:
tryToWidenMemory() now first checks if the widening decision is to interleave,
thus maintaining previous behavior where tryToInterleaveMemory() was called
first, giving priority to interleave decisions over widening/scalarization. This
commit adds the test case that exposed this bug as a LIT.
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h')
-rw-r--r-- | llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h b/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h index a5e85f27fab..614f931cbc6 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h +++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h @@ -201,6 +201,9 @@ class LoopVectorizationPlanner { /// The profitability analysis. LoopVectorizationCostModel &CM; + /// The interleaved access analysis. + InterleavedAccessInfo &IAI; + SmallVector<VPlanPtr, 4> VPlans; /// This class is used to enable the VPlan to invoke a method of ILV. This is @@ -223,8 +226,10 @@ public: LoopVectorizationPlanner(Loop *L, LoopInfo *LI, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, LoopVectorizationLegality *Legal, - LoopVectorizationCostModel &CM) - : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM) {} + LoopVectorizationCostModel &CM, + InterleavedAccessInfo &IAI) + : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM), + IAI(IAI) {} /// Plan how to best vectorize, return the best VF and its cost, or None if /// vectorization and interleaving should be avoided up front. |