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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-25 15:42:02 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-25 15:42:02 +0000 |
commit | a066f1f9e6fc5f1399060a2cd22335ec4de7bb90 (patch) | |
tree | 015627707136acb7f2924b14209e667411382756 /llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp | |
parent | 3e34150009a8337e65fb737235ba57a78fc9b113 (diff) | |
download | bcm5719-llvm-a066f1f9e6fc5f1399060a2cd22335ec4de7bb90.tar.gz bcm5719-llvm-a066f1f9e6fc5f1399060a2cd22335ec4de7bb90.zip |
[Vectorizer] Add vectorization support for fixed smul/umul intrinsics
This requires a couple of tweaks to existing vectorization functions as they were assuming that only the second call argument (ctlz/cttz/powi) could ever be the 'always scalar' argument, but for smul.fix + umul.fix its the third argument.
Differential Revision: https://reviews.llvm.org/D58616
llvm-svn: 354790
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp')
-rw-r--r-- | llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp index 1d030944815..7361a3a3cdc 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp @@ -713,18 +713,21 @@ bool LoopVectorizationLegality::canVectorizeInstrs() { return false; } - // Intrinsics such as powi,cttz and ctlz are legal to vectorize if the - // second argument is the same (i.e. loop invariant) - if (CI && hasVectorInstrinsicScalarOpd( - getVectorIntrinsicIDForCall(CI, TLI), 1)) { + // Some intrinsics have scalar arguments and should be same in order for + // them to be vectorized (i.e. loop invariant). + if (CI) { auto *SE = PSE.getSE(); - if (!SE->isLoopInvariant(PSE.getSCEV(CI->getOperand(1)), TheLoop)) { - ORE->emit(createMissedAnalysis("CantVectorizeIntrinsic", CI) - << "intrinsic instruction cannot be vectorized"); - LLVM_DEBUG(dbgs() - << "LV: Found unvectorizable intrinsic " << *CI << "\n"); - return false; - } + Intrinsic::ID IntrinID = getVectorIntrinsicIDForCall(CI, TLI); + for (unsigned i = 0, e = CI->getNumArgOperands(); i != e; ++i) + if (hasVectorInstrinsicScalarOpd(IntrinID, i)) { + if (!SE->isLoopInvariant(PSE.getSCEV(CI->getOperand(i)), TheLoop)) { + ORE->emit(createMissedAnalysis("CantVectorizeIntrinsic", CI) + << "intrinsic instruction cannot be vectorized"); + LLVM_DEBUG(dbgs() << "LV: Found unvectorizable intrinsic " << *CI + << "\n"); + return false; + } + } } // Check that the instruction return type is vectorizable. |