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| author | Craig Topper <craig.topper@intel.com> | 2018-04-29 06:24:09 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-29 06:24:09 +0000 |
| commit | 18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034 (patch) | |
| tree | 1e6ca84d27fc7fb02d9045aaad0c1ba3cdc2bcc1 /llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp | |
| parent | d186829093e8c9b2d96cb5b10c81a6e78519e33b (diff) | |
| download | bcm5719-llvm-18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034.tar.gz bcm5719-llvm-18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034.zip | |
[X86] Add suffixes to the LGDT/LIDT/SGDT/SIDT mnemonics in Intel syntax. Add aliases based on 16/32-bit mode to choose the default.
This allows the instruction selection to follow mode in Intel syntax. And allows a suffix to be used to change size.
This matches gas behavior from what I could tell.
llvm-svn: 331138
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp')
0 files changed, 0 insertions, 0 deletions
