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authorScott Michel <scottm@aero.org>2008-01-29 02:29:31 +0000
committerScott Michel <scottm@aero.org>2008-01-29 02:29:31 +0000
commit167502a508f6f4e433f0e1af052ee7fbd585775c (patch)
tree95afc73c20b95ec11fce9f903a339cc17524ffdd /llvm/lib/Transforms/Utils/Mem2Reg.cpp
parentef33767efb2e80e9ddadb27a958642eeea777d8a (diff)
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Fix to bug 1951: tblgen gratuitously renames variables when no temporary was
generated. This feature would only show up in fairly complex patterns, such as this one in CellSPU: def : Pat<(add (SPUhi tconstpool:$in, 0), (SPUlo tconstpool:$in, 0)), (IOHLlo (ILHUhi tconstpool:$in), tconstpool:$in)>; which generated the following emit code: SDNode *Emit_0(const SDOperand &N, unsigned Opc0, unsigned Opc1, MVT::ValueType VT0, MVT::ValueType VT1) DISABLE_INLINE { SDOperand N0 = N.getOperand(0); SDOperand N00 = N0.getOperand(0); SDOperand N01 = N0.getOperand(1); SDOperand N1 = N.getOperand(1); SDOperand N10 = N1.getOperand(0); SDOperand N11 = N1.getOperand(1); SDOperand Tmp3(CurDAG->getTargetNode(Opc0, VT0, N00), 0); return CurDAG->SelectNodeTo(N.Val, Opc1, VT1, Tmp3, Tmp2); /* Tmp2 s/b N00 */ } Tested against the test suites without incident. llvm-svn: 46487
Diffstat (limited to 'llvm/lib/Transforms/Utils/Mem2Reg.cpp')
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