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| author | Evan Cheng <evan.cheng@apple.com> | 2007-07-19 01:14:50 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-19 01:14:50 +0000 |
| commit | 94b5a80b939b0b82466d211c2708135cb6f59c8e (patch) | |
| tree | 09b89a45d46bf5e4eab9b371efc6ee6cd3b1b88e /llvm/lib/Transforms/Utils/LCSSA.cpp | |
| parent | fbd098332ca3e161fe2f2dbecdf0e17404f1a37c (diff) | |
| download | bcm5719-llvm-94b5a80b939b0b82466d211c2708135cb6f59c8e.tar.gz bcm5719-llvm-94b5a80b939b0b82466d211c2708135cb6f59c8e.zip | |
Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
Diffstat (limited to 'llvm/lib/Transforms/Utils/LCSSA.cpp')
0 files changed, 0 insertions, 0 deletions
