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authorAlina Sbirlea <asbirlea@google.com>2019-11-20 13:44:51 -0800
committerAlina Sbirlea <asbirlea@google.com>2019-11-20 16:36:52 -0800
commitda4baa2a6c966154e19964fdced1119ed2f4d6ee (patch)
treed082c26fab0399dda855cbdff71c28d6981b03a7 /llvm/lib/Transforms/Scalar
parent049043b598ef5b12a5894c0c22db8608be70f517 (diff)
downloadbcm5719-llvm-da4baa2a6c966154e19964fdced1119ed2f4d6ee.tar.gz
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[MemorySSA] Update analysis when the terminator is a memory instruction.
Update MemorySSA when moving the terminator instruction, as that may be a memory touching instruction. Resolves PR44029.
Diffstat (limited to 'llvm/lib/Transforms/Scalar')
-rw-r--r--llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp b/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
index e55d8570ffa..b27e65e0adb 100644
--- a/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
@@ -662,6 +662,9 @@ static bool mergeBlocksIntoPredecessors(Loop &L, DominatorTree &DT,
// Merge Succ into Pred and delete it.
MergeBlockIntoPredecessor(Succ, &DTU, &LI, MSSAU);
+ if (MSSAU && VerifyMemorySSA)
+ MSSAU->getMemorySSA()->verifyMemorySSA();
+
Changed = true;
}
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