Fix LSR's IV sorting function to explicitly sort by bitwidth

after sorting by stride value. This prevents it from missing
IV reuse opportunities in a host-sensitive manner.

llvm-svn: 64415

1 files changed, 11 insertions, 4 deletions

diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index a5fcdb43bec..683f741d1e8 100644
--- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -1772,12 +1772,19 @@ namespace {
         int64_t  RV = RHSC->getValue()->getSExtValue();
         uint64_t ALV = (LV < 0) ? -LV : LV;
         uint64_t ARV = (RV < 0) ? -RV : RV;
-        if (ALV == ARV)
-          return LV > RV;
-        else
+        if (ALV == ARV) {
+          if (LV != RV)
+            return LV > RV;
+        } else {
           return ALV < ARV;
+        }
+
+        // If it's the same value but different type, sort by bit width so
+        // that we emit larger induction variables before smaller
+        // ones, letting the smaller be re-written in terms of larger ones.
+        return RHS->getBitWidth() < LHS->getBitWidth();
       }
-      return (LHSC && !RHSC);
+      return LHSC && !RHSC;
     }
   };
 }