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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-19 20:44:15 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-19 20:44:15 +0000
commit4d000d24889670bb433eb3379e8936c6fb1ab615 (patch)
treec15b7e6fae0ba7c226ae80fa1ed66591e486e748 /llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
parentf8104f01e6bf5c24a9c65ec8ce6788d565c1e153 (diff)
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AMDGPU: Fix folding immediate into readfirstlane through reg_sequence
The def instruction for the vreg may not match, because it may be folding through a reg_sequence. The assert was overly conservative and not necessary. It's not actually important if DefMI really defined the register, because the fold that will be done cares about the def of the value that will be folded. For some reason copies aren't making it through the reg_sequence, although they should. llvm-svn: 363876
Diffstat (limited to 'llvm/lib/Transforms/Scalar/IndVarSimplify.cpp')
0 files changed, 0 insertions, 0 deletions
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