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| author | Vedant Kumar <vsk@apple.com> | 2018-08-16 22:24:47 +0000 |
|---|---|---|
| committer | Vedant Kumar <vsk@apple.com> | 2018-08-16 22:24:47 +0000 |
| commit | ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0 (patch) | |
| tree | f743e5d472f7bd629ce33757b8b837644a976f07 /llvm/lib/Transforms/Instrumentation | |
| parent | ada3f77e4420d30e7bf39e215763a66e1ebdbe97 (diff) | |
| download | bcm5719-llvm-ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0.tar.gz bcm5719-llvm-ee6c233ae045f36f5bb5c7a8d14cfc9d41c634d0.zip | |
[InstrProf] Use atomic profile counter updates for TSan
Thread sanitizer instrumentation fails to skip all loads and stores to
profile counters. This can happen if profile counter updates are merged:
%.sink = phi i64* ...
%pgocount5 = load i64, i64* %.sink
%27 = add i64 %pgocount5, 1
%28 = bitcast i64* %.sink to i8*
call void @__tsan_write8(i8* %28)
store i64 %27, i64* %.sink
To suppress TSan diagnostics about racy counter updates, make the
counter updates atomic when TSan is enabled. If there's general interest
in this mode it can be surfaced as a clang/swift driver option.
Testing: check-{llvm,clang,profile}
rdar://40477803
Differential Revision: https://reviews.llvm.org/D50867
llvm-svn: 339955
Diffstat (limited to 'llvm/lib/Transforms/Instrumentation')
| -rw-r--r-- | llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp index 4d5dfb0aa66..62da9300253 100644 --- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp +++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp @@ -96,6 +96,11 @@ cl::opt<double> NumCountersPerValueSite( // is usually smaller than 2. cl::init(1.0)); +cl::opt<bool> AtomicCounterUpdateAll( + "instrprof-atomic-counter-update-all", cl::ZeroOrMore, + cl::desc("Make all profile counter updates atomic (for testing only)"), + cl::init(false)); + cl::opt<bool> AtomicCounterUpdatePromoted( "atomic-counter-update-promoted", cl::ZeroOrMore, cl::desc("Do counter update using atomic fetch add " @@ -597,12 +602,17 @@ void InstrProfiling::lowerIncrement(InstrProfIncrementInst *Inc) { IRBuilder<> Builder(Inc); uint64_t Index = Inc->getIndex()->getZExtValue(); Value *Addr = Builder.CreateConstInBoundsGEP2_64(Counters, 0, Index); - Value *Load = Builder.CreateLoad(Addr, "pgocount"); - auto *Count = Builder.CreateAdd(Load, Inc->getStep()); - auto *Store = Builder.CreateStore(Count, Addr); - Inc->replaceAllUsesWith(Store); - if (isCounterPromotionEnabled()) - PromotionCandidates.emplace_back(cast<Instruction>(Load), Store); + + if (Options.Atomic || AtomicCounterUpdateAll) { + Builder.CreateAtomicRMW(AtomicRMWInst::Add, Addr, Inc->getStep(), + AtomicOrdering::Monotonic); + } else { + Value *Load = Builder.CreateLoad(Addr, "pgocount"); + auto *Count = Builder.CreateAdd(Load, Inc->getStep()); + auto *Store = Builder.CreateStore(Count, Addr); + if (isCounterPromotionEnabled()) + PromotionCandidates.emplace_back(cast<Instruction>(Load), Store); + } Inc->eraseFromParent(); } |

