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authorMatt Arsenault <Matthew.Arsenault@amd.com>2018-06-25 16:17:48 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2018-06-25 16:17:48 +0000
commitb1cc4f52ff0fbec69064ad72a3527dc0406ac03b (patch)
tree7f61fa7b3db597712eff5715b5144ef38704daa4 /llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
parent1c79e4e9592a7543f5ecf302c6d1e59dfea58671 (diff)
downloadbcm5719-llvm-b1cc4f52ff0fbec69064ad72a3527dc0406ac03b.tar.gz
bcm5719-llvm-b1cc4f52ff0fbec69064ad72a3527dc0406ac03b.zip
AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr
Note a normal select test is not currently possible because this relies on input registers tracked in SIMachineFunctionInfo which are not currently serializable in MIR, but this does work end-to-end from the IR. llvm-svn: 335490
Diffstat (limited to 'llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp')
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