[IR] add/use isIntDivRem convenience function

There are more existing potential users of this,
but I've limited this patch to the first couple
that I found to minimize typo risk.

llvm-svn: 335157

1 files changed, 1 insertions, 3 deletions

diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 2b9db4baafa..1281c99f8dd 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -1423,9 +1423,7 @@ Instruction *InstCombiner::foldShuffledBinop(BinaryOperator &Inst) {
       // undefined behavior. All other binop opcodes are always safe to
       // speculate, and therefore, it is fine to include undef elements for
       // unused lanes (and using undefs may help optimization).
-      BinaryOperator::BinaryOps Opcode = Inst.getOpcode();
-      if (Opcode == Instruction::UDiv || Opcode == Instruction::URem ||
-          Opcode == Instruction::SDiv || Opcode == Instruction::SRem) {
+      if (Inst.isIntDivRem()) {
         assert(C->getType()->getScalarType()->isIntegerTy() &&
                "Not expecting FP opcodes/operands/constants here");
         for (unsigned i = 0; i < VWidth; ++i)