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| author | Craig Topper <craig.topper@gmail.com> | 2016-12-27 05:30:09 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-12-27 05:30:09 +0000 |
| commit | 72f2d4e8d6902dd2f35eeb81795c39dac16a7cb9 (patch) | |
| tree | 43032c86b564f0037ac4840a0f57af8f55173e2b /llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | |
| parent | 162504578bf160985aa0da73fcce6dbb1b027503 (diff) | |
| download | bcm5719-llvm-72f2d4e8d6902dd2f35eeb81795c39dac16a7cb9.tar.gz bcm5719-llvm-72f2d4e8d6902dd2f35eeb81795c39dac16a7cb9.zip | |
[InstCombine][X86] Add DemandedElts support for 512-bit PMULDQ/PMULUDQ instructions
PMULDQ/PMULUDQ vXi64 instructions only use the even numbered v2Xi32 input elements which SimplifyDemandedVectorElts should try and use.
This builds on r290554 which added supported for 128 and 256-bit.
llvm-svn: 290582
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 592eeb7fa0e..0738883be15 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -1434,7 +1434,9 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, case Intrinsic::x86_sse2_pmulu_dq: case Intrinsic::x86_sse41_pmuldq: case Intrinsic::x86_avx2_pmul_dq: - case Intrinsic::x86_avx2_pmulu_dq: { + case Intrinsic::x86_avx2_pmulu_dq: + case Intrinsic::x86_avx512_pmul_dq_512: + case Intrinsic::x86_avx512_pmulu_dq_512: { Value *Op0 = II->getArgOperand(0); Value *Op1 = II->getArgOperand(1); unsigned InnerVWidth = Op0->getType()->getVectorNumElements(); |
