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authorChris Lattner <sabre@nondot.org>2011-02-10 05:09:34 +0000
committerChris Lattner <sabre@nondot.org>2011-02-10 05:09:34 +0000
commit768003c59eb2f235d9604229caa98124ca9afe87 (patch)
tree6001dab34b3b5d078d67ecea9b4db22641424caa /llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
parent1656db69f3467ae9d127fde8dd5ce06e2990095e (diff)
downloadbcm5719-llvm-768003c59eb2f235d9604229caa98124ca9afe87.tar.gz
bcm5719-llvm-768003c59eb2f235d9604229caa98124ca9afe87.zip
teach SimplifyDemandedBits that exact shifts demand the bits they
are shifting out since they do require them to be zeros. Similarly for NUW/NSW bits of shl llvm-svn: 125263
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp')
0 files changed, 0 insertions, 0 deletions
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