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authorSanjay Patel <spatel@rotateright.com>2017-12-26 22:12:20 +0000
committerSanjay Patel <spatel@rotateright.com>2017-12-26 22:12:20 +0000
commit14adbacd8ad5a39db30deb09ed4904f5aa83e6e4 (patch)
tree3b3d6b826ffab7cae766f6128b16aac670fd6694 /llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
parent546c43fd1a64b87729ca1120069e171eaef2c3c6 (diff)
downloadbcm5719-llvm-14adbacd8ad5a39db30deb09ed4904f5aa83e6e4.tar.gz
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[InstCombine] fix miscompile of frem with 0.0 operand (PR34870)
We might want to select NAN here or do this transform with fast-math, but this should at least fix the miscompile. llvm-svn: 321461
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 87666360c1a..541dde6c47d 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1631,9 +1631,5 @@ Instruction *InstCombiner::visitFRem(BinaryOperator &I) {
SQ.getWithInstruction(&I)))
return replaceInstUsesWith(I, V);
- // Handle cases involving: rem X, (select Cond, Y, Z)
- if (simplifyDivRemOfSelectWithZeroOp(I))
- return &I;
-
return nullptr;
}
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