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author | Philip Reames <listmail@philipreames.com> | 2016-04-21 17:59:40 +0000 |
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committer | Philip Reames <listmail@philipreames.com> | 2016-04-21 17:59:40 +0000 |
commit | a98c7ead306647142fd954f64cc9d5184a17fd28 (patch) | |
tree | 7208b37e63022d288cc4002929c649b1ee4c33da /llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp | |
parent | f0f279291c7ca1a0b2c125f53cd08deafcc9e44f (diff) | |
download | bcm5719-llvm-a98c7ead306647142fd954f64cc9d5184a17fd28.tar.gz bcm5719-llvm-a98c7ead306647142fd954f64cc9d5184a17fd28.zip |
[instcombine][unordered] Extend load(select) transform to handle unordered loads
llvm-svn: 267023
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp')
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp index 981dfc12491..4ca9ab4447d 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp @@ -867,10 +867,6 @@ Instruction *InstCombiner::visitLoadInst(LoadInst &LI) { return replaceInstUsesWith(LI, UndefValue::get(LI.getType())); } - // TODO: The transform below needs updated for unordered loads - if (!LI.isSimple()) - return nullptr; - if (Op->hasOneUse()) { // Change select and PHI nodes to select values instead of addresses: this // helps alias analysis out a lot, allows many others simplifications, and @@ -891,8 +887,11 @@ Instruction *InstCombiner::visitLoadInst(LoadInst &LI) { SI->getOperand(1)->getName()+".val"); LoadInst *V2 = Builder->CreateLoad(SI->getOperand(2), SI->getOperand(2)->getName()+".val"); + assert(LI.isUnordered() && "implied by above"); V1->setAlignment(Align); + V1->setAtomic(LI.getOrdering(), LI.getSynchScope()); V2->setAlignment(Align); + V2->setAtomic(LI.getOrdering(), LI.getSynchScope()); return SelectInst::Create(SI->getCondition(), V1, V2); } |