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| author | Alex Bradbury <asb@lowrisc.org> | 2017-12-12 15:17:45 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-12-12 15:17:45 +0000 |
| commit | 8bba6bfeef6853194f47f85c7391bc3b52e867f0 (patch) | |
| tree | 3b077386bf994e0466534125281eee5625fe7af8 /llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp | |
| parent | 1daef8a6678a066758e340d10e84f337979a0c6b (diff) | |
| download | bcm5719-llvm-8bba6bfeef6853194f47f85c7391bc3b52e867f0.tar.gz bcm5719-llvm-8bba6bfeef6853194f47f85c7391bc3b52e867f0.zip | |
[RISCV] MC layer support for the instructions added in the privileged spec
Adds support for the instructions added in the RISC-V privileged ISA
(https://content.riscv.org/wp-content/uploads/2017/05/riscv-privileged-v1.10.pdf):
uret, sret, mret, wfi, and sfence.vma.
Note from the committer: I made very minor formatting changes prior to commit,
which didn't seem worth creating another review round-trip for.
Differential Revision: https://reviews.llvm.org/D40383
Patch by David Craven.
llvm-svn: 320484
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp')
0 files changed, 0 insertions, 0 deletions
