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authorGabor Greif <ggreif@gmail.com>2010-04-15 10:49:53 +0000
committerGabor Greif <ggreif@gmail.com>2010-04-15 10:49:53 +0000
commitaafd20963209e1f19235de9de1afed3584a830c3 (patch)
tree12c58a436feb1f125c59847363fa04dcf0f798fd /llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
parenta1e20de9084036fa2977004a31abf5ff490d8c8d (diff)
downloadbcm5719-llvm-aafd20963209e1f19235de9de1afed3584a830c3.tar.gz
bcm5719-llvm-aafd20963209e1f19235de9de1afed3584a830c3.zip
rotate CallInst operands, i.e. move callee to the back
of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101364
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 861cf92d281..1812e1d3a21 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -1423,7 +1423,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
switch (II->getIntrinsicID()) {
case Intrinsic::bswap:
Worklist.Add(II);
- ICI.setOperand(0, II->getOperand(1));
+ ICI.setOperand(0, II->getOperand(0));
ICI.setOperand(1, ConstantInt::get(II->getContext(), RHSV.byteSwap()));
return &ICI;
case Intrinsic::ctlz:
@@ -1431,7 +1431,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
// ctz(A) == bitwidth(a) -> A == 0 and likewise for !=
if (RHSV == RHS->getType()->getBitWidth()) {
Worklist.Add(II);
- ICI.setOperand(0, II->getOperand(1));
+ ICI.setOperand(0, II->getOperand(0));
ICI.setOperand(1, ConstantInt::get(RHS->getType(), 0));
return &ICI;
}
@@ -1440,7 +1440,7 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
// popcount(A) == 0 -> A == 0 and likewise for !=
if (RHS->isZero()) {
Worklist.Add(II);
- ICI.setOperand(0, II->getOperand(1));
+ ICI.setOperand(0, II->getOperand(0));
ICI.setOperand(1, RHS);
return &ICI;
}
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