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authorCraig Topper <craig.topper@gmail.com>2016-12-31 00:45:06 +0000
committerCraig Topper <craig.topper@gmail.com>2016-12-31 00:45:06 +0000
commitd00db69227f89a9d3368f8487344d2e102df7931 (patch)
tree26c626796400691d325764f67bee22922d3c882f /llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
parent4a12eab82829e762a9a424126bf21429f5ba1b12 (diff)
downloadbcm5719-llvm-d00db69227f89a9d3368f8487344d2e102df7931.tar.gz
bcm5719-llvm-d00db69227f89a9d3368f8487344d2e102df7931.zip
[InstCombine][AVX-512] Teach InstCombine that llvm.x86.avx512.vcomi.sd and llvm.x86.avx512.vcomi.ss don't use the upper elements of their input.
This was already done for the SSE/SSE2 version of the intrinsics. llvm-svn: 290776
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp')
-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 25f692c6fb9..92369bd70b1 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -1775,6 +1775,8 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
case Intrinsic::x86_sse2_ucomile_sd:
case Intrinsic::x86_sse2_ucomilt_sd:
case Intrinsic::x86_sse2_ucomineq_sd:
+ case Intrinsic::x86_avx512_vcomi_ss:
+ case Intrinsic::x86_avx512_vcomi_sd:
case Intrinsic::x86_avx512_mask_cmp_ss:
case Intrinsic::x86_avx512_mask_cmp_sd: {
// These intrinsics only demand the 0th element of their input vectors. If
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