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| author | Alex Bradbury <asb@lowrisc.org> | 2018-01-17 14:17:12 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-01-17 14:17:12 +0000 |
| commit | d93f889d8944fa0175f6f4b3eced2224086a7b00 (patch) | |
| tree | 79cce6ab3c110eef00c42b066387fa7ec74d25ff /llvm/lib/Transforms/Coroutines | |
| parent | c62a16234b587bdfd934da85ddd2b49ce0584c3a (diff) | |
| download | bcm5719-llvm-d93f889d8944fa0175f6f4b3eced2224086a7b00.tar.gz bcm5719-llvm-d93f889d8944fa0175f6f4b3eced2224086a7b00.zip | |
[RISCV] Allow RISCVAsmBackend::writeNopData to generate c.nop when supported
When the compressed instruction set is enabled, the 16-bit c.nop can be
generated if necessary.
Differential Revision: https://reviews.llvm.org/D41221
Patch by Shiva Chen.
llvm-svn: 322658
Diffstat (limited to 'llvm/lib/Transforms/Coroutines')
0 files changed, 0 insertions, 0 deletions
