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author | Hal Finkel <hfinkel@anl.gov> | 2014-07-24 12:16:19 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-07-24 12:16:19 +0000 |
commit | cc39b675308922229f7e16ceb47e8d9b5b2e8dcd (patch) | |
tree | 8f00abe761e89b654d46a79dd14dcd45a3d27777 /llvm/lib/Target/XCore | |
parent | 545ff90d47c241e5dc6869be9377a75f718aa4c1 (diff) | |
download | bcm5719-llvm-cc39b675308922229f7e16ceb47e8d9b5b2e8dcd.tar.gz bcm5719-llvm-cc39b675308922229f7e16ceb47e8d9b5b2e8dcd.zip |
AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information
after inlining, and the representation of block-level __restrict__ pointer
information (etc.), additional kinds of aliasing metadata will be introduced.
This metadata needs to be carried around in AliasAnalysis::Location objects
(and MMOs at the SDAG level), and so we need to generalize the current scheme
(which is hard-coded to just one TBAA MDNode*).
This commit introduces only the necessary refactoring to allow for the
introduction of other aliasing metadata types, but does not actually introduce
any (that will come in a follow-up commit). What it does introduce is a new
AAMDNodes structure to hold all of the aliasing metadata nodes associated with
a particular memory-accessing instruction, and uses that structure instead of
the raw MDNode* in AliasAnalysis::Location, etc.
No functionality change intended.
llvm-svn: 213859
Diffstat (limited to 'llvm/lib/Target/XCore')
-rw-r--r-- | llvm/lib/Target/XCore/XCoreISelLowering.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index be7ef642019..492784d44d5 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -969,7 +969,7 @@ LowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const { N->getBasePtr(), N->getPointerInfo(), N->isVolatile(), N->isNonTemporal(), N->isInvariant(), N->getAlignment(), - N->getTBAAInfo(), N->getRanges()); + N->getAAInfo(), N->getRanges()); } if (N->getMemoryVT() == MVT::i16) { if (N->getAlignment() < 2) @@ -977,13 +977,13 @@ LowerATOMIC_LOAD(SDValue Op, SelectionDAG &DAG) const { return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), N->getBasePtr(), N->getPointerInfo(), MVT::i16, N->isVolatile(), N->isNonTemporal(), - N->getAlignment(), N->getTBAAInfo()); + N->getAlignment(), N->getAAInfo()); } if (N->getMemoryVT() == MVT::i8) return DAG.getExtLoad(ISD::EXTLOAD, SDLoc(Op), MVT::i32, N->getChain(), N->getBasePtr(), N->getPointerInfo(), MVT::i8, N->isVolatile(), N->isNonTemporal(), - N->getAlignment(), N->getTBAAInfo()); + N->getAlignment(), N->getAAInfo()); return SDValue(); } @@ -999,7 +999,7 @@ LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const { return DAG.getStore(N->getChain(), SDLoc(Op), N->getVal(), N->getBasePtr(), N->getPointerInfo(), N->isVolatile(), N->isNonTemporal(), - N->getAlignment(), N->getTBAAInfo()); + N->getAlignment(), N->getAAInfo()); } if (N->getMemoryVT() == MVT::i16) { if (N->getAlignment() < 2) @@ -1007,13 +1007,13 @@ LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const { return DAG.getTruncStore(N->getChain(), SDLoc(Op), N->getVal(), N->getBasePtr(), N->getPointerInfo(), MVT::i16, N->isVolatile(), N->isNonTemporal(), - N->getAlignment(), N->getTBAAInfo()); + N->getAlignment(), N->getAAInfo()); } if (N->getMemoryVT() == MVT::i8) return DAG.getTruncStore(N->getChain(), SDLoc(Op), N->getVal(), N->getBasePtr(), N->getPointerInfo(), MVT::i8, N->isVolatile(), N->isNonTemporal(), - N->getAlignment(), N->getTBAAInfo()); + N->getAlignment(), N->getAAInfo()); return SDValue(); } |