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| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-19 06:37:02 +0000 |
| commit | 2129f596379548d52745fc5906d86361a811ed08 (patch) | |
| tree | 41c6f7de43be662e0e883ddc70a91d9cd3da2016 /llvm/lib/Target/XCore | |
| parent | a63d08c9ff246e83ea61f1ae7eafe41d37035d45 (diff) | |
| download | bcm5719-llvm-2129f596379548d52745fc5906d86361a811ed08.tar.gz bcm5719-llvm-2129f596379548d52745fc5906d86361a811ed08.zip | |
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
llvm-svn: 135468
Diffstat (limited to 'llvm/lib/Target/XCore')
| -rw-r--r-- | llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.h | 4 |
3 files changed, 17 insertions, 6 deletions
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp index 104170c3285..f44e62cf799 100644 --- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -75,3 +75,14 @@ static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) { extern "C" void LLVMInitializeXCoreMCAsmInfo() { RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo); } + +MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeXCoreMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget, + createXCoreMCCodeGenInfo); +} diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 342966ae5c8..0c0267dd69f 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -19,10 +19,10 @@ using namespace llvm; /// XCoreTargetMachine ctor - Create an ILP32 architecture model /// -XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, + StringRef CPU, + StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" "i16:16:32-i32:32:32-i64:32:32-n32"), diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.h b/llvm/lib/Target/XCore/XCoreTargetMachine.h index 6235ac3a6a1..f782e173d4e 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.h +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.h @@ -32,8 +32,8 @@ class XCoreTargetMachine : public LLVMTargetMachine { XCoreTargetLowering TLInfo; XCoreSelectionDAGInfo TSInfo; public: - XCoreTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + XCoreTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const XCoreFrameLowering *getFrameLowering() const { |
