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authorDan Gohman <gohman@apple.com>2008-11-18 19:49:32 +0000
committerDan Gohman <gohman@apple.com>2008-11-18 19:49:32 +0000
commit0b2732598c9beca83906644cdbb95040b7885aac (patch)
tree82210908d34142ebffcbd0b6a5ee2f2ea70028f6 /llvm/lib/Target/XCore
parent119f60e12a3acc1a82c08337a7f90436ab4b8012 (diff)
downloadbcm5719-llvm-0b2732598c9beca83906644cdbb95040b7885aac.tar.gz
bcm5719-llvm-0b2732598c9beca83906644cdbb95040b7885aac.zip
Add more const qualifiers. This fixes build breakage from r59540.
llvm-svn: 59542
Diffstat (limited to 'llvm/lib/Target/XCore')
-rw-r--r--llvm/lib/Target/XCore/XCoreInstrInfo.cpp7
-rw-r--r--llvm/lib/Target/XCore/XCoreInstrInfo.h8
2 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
index 4d0f42a0208..8e6a5afd969 100644
--- a/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
+++ b/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
@@ -75,7 +75,7 @@ bool XCoreInstrInfo::isMoveInstr(const MachineInstr &MI,
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than loading from the stack slot.
unsigned
-XCoreInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{
+XCoreInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const{
int Opcode = MI->getOpcode();
if (Opcode == XCore::LDWSP_ru6 || Opcode == XCore::LDWSP_lru6)
{
@@ -96,7 +96,8 @@ XCoreInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
unsigned
-XCoreInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
+XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const {
int Opcode = MI->getOpcode();
if (Opcode == XCore::STWSP_ru6 || Opcode == XCore::STWSP_lru6)
{
@@ -126,7 +127,7 @@ XCoreInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
/// only return true of *all* loads the instruction does are invariant (if it
/// does multiple loads).
bool
-XCoreInstrInfo::isInvariantLoad(MachineInstr *MI) const {
+XCoreInstrInfo::isInvariantLoad(const MachineInstr *MI) const {
// Loads from constants pools and loads from invariant argument slots are
// invariant
int Opcode = MI->getOpcode();
diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.h b/llvm/lib/Target/XCore/XCoreInstrInfo.h
index 6213f17238d..6a246b4ffb4 100644
--- a/llvm/lib/Target/XCore/XCoreInstrInfo.h
+++ b/llvm/lib/Target/XCore/XCoreInstrInfo.h
@@ -41,16 +41,18 @@ public:
/// the destination along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than loading from the stack slot.
- virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const;
/// isStoreToStackSlot - If the specified machine instruction is a direct
/// store to a stack slot, return the virtual or physical register number of
/// the source reg along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
- virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const;
- virtual bool isInvariantLoad(MachineInstr *MI) const;
+ virtual bool isInvariantLoad(const MachineInstr *MI) const;
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
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