diff options
author | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
---|---|---|
committer | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
commit | d913448b38bab6ace92ae5057b917eb57035f83b (patch) | |
tree | f2050928fa5994c44fab60d66e7d89e7cc7d7a4f /llvm/lib/Target/XCore/XCoreISelLowering.cpp | |
parent | acc8ef273b1c3796b0fc7f19aa347115b4bc2ea4 (diff) | |
download | bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.tar.gz bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.zip |
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.
llvm-svn: 214781
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/XCore/XCoreISelLowering.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index f3e14dc2746..39fd26e1d37 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -805,7 +805,8 @@ SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, return SDValue(); MachineFunction &MF = DAG.getMachineFunction(); - const TargetRegisterInfo *RegInfo = getTargetMachine().getRegisterInfo(); + const TargetRegisterInfo *RegInfo = + getTargetMachine().getSubtargetImpl()->getRegisterInfo(); return DAG.getCopyFromReg(DAG.getEntryNode(), SDLoc(Op), RegInfo->getFrameRegister(MF), MVT::i32); } @@ -851,7 +852,8 @@ LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const { SDLoc dl(Op); // Absolute SP = (FP + FrameToArgs) + Offset - const TargetRegisterInfo *RegInfo = getTargetMachine().getRegisterInfo(); + const TargetRegisterInfo *RegInfo = + getTargetMachine().getSubtargetImpl()->getRegisterInfo(); SDValue Stack = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RegInfo->getFrameRegister(MF), MVT::i32); SDValue FrameToArgs = DAG.getNode(XCoreISD::FRAME_TO_ARGS_OFFSET, dl, @@ -1546,7 +1548,8 @@ XCoreTargetLowering::LowerReturn(SDValue Chain, MachineBasicBlock * XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const { - const TargetInstrInfo &TII = *getTargetMachine().getInstrInfo(); + const TargetInstrInfo &TII = + *getTargetMachine().getSubtargetImpl()->getInstrInfo(); DebugLoc dl = MI->getDebugLoc(); assert((MI->getOpcode() == XCore::SELECT_CC) && "Unexpected instr type to insert"); @@ -1919,7 +1922,7 @@ XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, if (Ty->getTypeID() == Type::VoidTyID) return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs); - const DataLayout *TD = TM.getDataLayout(); + const DataLayout *TD = TM.getSubtargetImpl()->getDataLayout(); unsigned Size = TD->getTypeAllocSize(Ty); if (AM.BaseGV) { return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 && |