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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-06-12 11:08:29 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-06-12 11:08:29 +0000 |
| commit | ca39de71997f582d4c32feb88f3ac2a9948b90a7 (patch) | |
| tree | 1617805ee577db420de9c04636f388d58cf56e79 /llvm/lib/Target/XCore/XCoreISelLowering.cpp | |
| parent | 564d248ec2f2a1dc0245ee7942a32fb72e7e1c84 (diff) | |
| download | bcm5719-llvm-ca39de71997f582d4c32feb88f3ac2a9948b90a7.tar.gz bcm5719-llvm-ca39de71997f582d4c32feb88f3ac2a9948b90a7.zip | |
[XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI.
Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.
llvm-svn: 363141
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreISelLowering.cpp | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index 2145ba5a6f8..072278d9fc4 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -1778,11 +1778,10 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N, break; case ISD::STORE: { // Replace unaligned store of unaligned load with memmove. - StoreSDNode *ST = cast<StoreSDNode>(N); + StoreSDNode *ST = cast<StoreSDNode>(N); if (!DCI.isBeforeLegalize() || - allowsMisalignedMemoryAccesses(ST->getMemoryVT(), - ST->getAddressSpace(), - ST->getAlignment()) || + allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), + ST->getMemoryVT(), *ST->getMemOperand()) || ST->isVolatile() || ST->isIndexed()) { break; } @@ -1791,12 +1790,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N, unsigned StoreBits = ST->getMemoryVT().getStoreSizeInBits(); assert((StoreBits % 8) == 0 && "Store size in bits must be a multiple of 8"); - unsigned ABIAlignment = DAG.getDataLayout().getABITypeAlignment( - ST->getMemoryVT().getTypeForEVT(*DCI.DAG.getContext())); unsigned Alignment = ST->getAlignment(); - if (Alignment >= ABIAlignment) { - break; - } if (LoadSDNode *LD = dyn_cast<LoadSDNode>(ST->getValue())) { if (LD->hasNUsesOfValue(1, 0) && ST->getMemoryVT() == LD->getMemoryVT() && |
