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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
| commit | bd7d80a4a6b70bf303fd9344d3e70bbe1420062a (patch) | |
| tree | 1aa6a8e53ce6145eb05260d2c74335ac3c244dd2 /llvm/lib/Target/XCore/XCoreISelLowering.cpp | |
| parent | 0dba2b399e1cd331f70002f6b922e45bda2b5c2c (diff) | |
| download | bcm5719-llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.tar.gz bcm5719-llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.zip | |
Add address space argument to isLegalAddressingMode
This is important because of different addressing modes
depending on the address space for GPU targets.
This only adds the argument, and does not update
any of the uses to provide the correct address space.
llvm-svn: 238723
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index f56caec24d6..aa71241102f 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -1926,7 +1926,8 @@ static inline bool isImmUs4(int64_t val) /// by AM is legal for this target, for a load/store of the specified type. bool XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, - Type *Ty) const { + Type *Ty, + unsigned AS) const { if (Ty->getTypeID() == Type::VoidTyID) return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs); |
