summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/XCore/XCoreISelLowering.cpp
diff options
context:
space:
mode:
authorRichard Osborne <richard@xmos.com>2009-07-16 10:48:47 +0000
committerRichard Osborne <richard@xmos.com>2009-07-16 10:48:47 +0000
commit5092f7ee9344db7918a80a29840073b1448539cb (patch)
treefc87dbf84b266a74049343d8235cbae70a52641c /llvm/lib/Target/XCore/XCoreISelLowering.cpp
parentbfdc557c8a90c875879bf2c2e9782d433ff008ab (diff)
downloadbcm5719-llvm-5092f7ee9344db7918a80a29840073b1448539cb.tar.gz
bcm5719-llvm-5092f7ee9344db7918a80a29840073b1448539cb.zip
Fix typo in last commit on expansion of unaligned loads.
llvm-svn: 75903
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreISelLowering.cpp')
-rw-r--r--llvm/lib/Target/XCore/XCoreISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
index 4e66738f680..7afc39e5e4b 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
@@ -424,7 +424,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG)
BasePtr, LD->getSrcValue(), SVOffset, MVT::i16,
LD->isVolatile(), 2);
SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
- DAG.getConstant(1, MVT::i32));
+ DAG.getConstant(2, MVT::i32));
SDValue High = DAG.getExtLoad(ISD::EXTLOAD, dl, MVT::i32, Chain,
HighAddr, LD->getSrcValue(), SVOffset + 2,
MVT::i16, LD->isVolatile(), 2);
@@ -487,7 +487,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG)
ST->getSrcValue(), SVOffset, MVT::i16,
ST->isVolatile(), 2);
SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
- DAG.getConstant(1, MVT::i32));
+ DAG.getConstant(2, MVT::i32));
SDValue StoreHigh = DAG.getTruncStore(Chain, dl, High, HighAddr,
ST->getSrcValue(), SVOffset + 2,
MVT::i16, ST->isVolatile(), 2);
OpenPOWER on IntegriCloud