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| author | Eric Christopher <echristo@gmail.com> | 2014-04-29 00:16:46 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2014-04-29 00:16:46 +0000 |
| commit | 612bb69bf70a67780617421d2937b97f0e1357db (patch) | |
| tree | ed80dc3666a80d8aba54ecb2602cef7efd598c52 /llvm/lib/Target/XCore/XCoreFrameLowering.cpp | |
| parent | 40af450562a7326c5bd0a94af732a1165f316591 (diff) | |
| download | bcm5719-llvm-612bb69bf70a67780617421d2937b97f0e1357db.tar.gz bcm5719-llvm-612bb69bf70a67780617421d2937b97f0e1357db.zip | |
None of these targets actually define their own CFI_INSTRUCTION
opcode so there's no reason to use the target namespace for it
rather than TargetOpcode.
llvm-svn: 207475
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp index 6a65a8cf121..5499aba351c 100644 --- a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp @@ -64,7 +64,8 @@ static void EmitDefCfaRegister(MachineBasicBlock &MBB, MachineModuleInfo *MMI, unsigned DRegNum) { unsigned CFIIndex = MMI->addFrameInst( MCCFIInstruction::createDefCfaRegister(nullptr, DRegNum)); - BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex); + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex); } static void EmitDefCfaOffset(MachineBasicBlock &MBB, @@ -73,7 +74,8 @@ static void EmitDefCfaOffset(MachineBasicBlock &MBB, MachineModuleInfo *MMI, int Offset) { unsigned CFIIndex = MMI->addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, -Offset)); - BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex); + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex); } static void EmitCfiOffset(MachineBasicBlock &MBB, @@ -82,7 +84,8 @@ static void EmitCfiOffset(MachineBasicBlock &MBB, unsigned DRegNum, int Offset) { unsigned CFIIndex = MMI->addFrameInst( MCCFIInstruction::createOffset(nullptr, DRegNum, Offset)); - BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex); + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex); } /// The SP register is moved in steps of 'MaxImmU16' towards the bottom of the |
