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| author | Craig Topper <craig.topper@intel.com> | 2017-12-15 01:03:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-15 01:03:38 +0000 |
| commit | 212070486dbc22a328dc2644f979b3a62a2a87e3 (patch) | |
| tree | 04de08db1f3216512da5247ec80e2bea66338795 /llvm/lib/Target/XCore/XCore.h | |
| parent | 89419f88bcff105bca261f37a8ae0fda02575ba6 (diff) | |
| download | bcm5719-llvm-212070486dbc22a328dc2644f979b3a62a2a87e3.tar.gz bcm5719-llvm-212070486dbc22a328dc2644f979b3a62a2a87e3.zip | |
[X86] Move some of the hasVLX qualified code out of the main hasAVX512 block in the X86ISelLowering constructor. NFCI
Move it into the separate hasVLX block later in the constructor.
I'm trying to separate 128/256 and 512-bit related code so we can eventually qualify the hasAVX512 block with support for 512-bit vectors required by the prefer-vector-width feature support being talked about in D41096.
llvm-svn: 320779
Diffstat (limited to 'llvm/lib/Target/XCore/XCore.h')
0 files changed, 0 insertions, 0 deletions
