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| author | Anton Afanasyev <anton.a.afanasyev@gmail.com> | 2019-02-13 08:26:43 +0000 |
|---|---|---|
| committer | Anton Afanasyev <anton.a.afanasyev@gmail.com> | 2019-02-13 08:26:43 +0000 |
| commit | ca9aff935339c84e5482367f8312e84f362692fc (patch) | |
| tree | d0824d900750c485e69258050e49c8f4213332d2 /llvm/lib/Target/X86/X86TargetTransformInfo.h | |
| parent | 84c0db859f94e724de4b55220a2d7e02c4f75fdb (diff) | |
| download | bcm5719-llvm-ca9aff935339c84e5482367f8312e84f362692fc.tar.gz bcm5719-llvm-ca9aff935339c84e5482367f8312e84f362692fc.zip | |
[X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)
Try to use 64-bit SLP vectorization. In addition to horizontal instrs
this change triggers optimizations for partial vector operations (for instance,
using low halfs of 128-bit registers xmm0 and xmm1 to multiply <2 x float> by
<2 x float>).
Fixes llvm.org/PR32433
llvm-svn: 353923
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.h')
| -rw-r--r-- | llvm/lib/Target/X86/X86TargetTransformInfo.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h index 4b5e181a07f..b2e3e05cbe3 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -59,6 +59,7 @@ public: unsigned getNumberOfRegisters(bool Vector); unsigned getRegisterBitWidth(bool Vector) const; + unsigned getMinVectorRegisterBitWidth() const; unsigned getLoadStoreVecRegBitWidth(unsigned AS) const; unsigned getMaxInterleaveFactor(unsigned VF); int getArithmeticInstrCost( |
