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| author | Scott Constable <scott.d.constable@intel.com> | 2020-04-02 21:00:44 -0700 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2020-06-24 09:31:04 -0700 |
| commit | fe73b9416dea5b309a6846a2dfb2d81bcb514c64 (patch) | |
| tree | 3e7ea8267d9e9f24cae448981ac40f3537d627c6 /llvm/lib/Target/X86/X86TargetMachine.cpp | |
| parent | 34f7e00333ac26c0b2b7f34b5988f2fec7d99f03 (diff) | |
| download | bcm5719-llvm-fe73b9416dea5b309a6846a2dfb2d81bcb514c64.tar.gz bcm5719-llvm-fe73b9416dea5b309a6846a2dfb2d81bcb514c64.zip | |
[X86][NFC] Generalize the naming of "Retpoline Thunks" and related code to "Indirect Thunks"
There are applications for indirect call/branch thunks other than retpoline for Spectre v2, e.g.,
https://software.intel.com/security-software-guidance/software-guidance/load-value-injection
Therefore it makes sense to refactor X86RetpolineThunks as a more general capability.
Differential Revision: https://reviews.llvm.org/D76810
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 7176e46f07b..c562106c74f 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -525,7 +525,7 @@ void X86PassConfig::addPreEmitPass2() { const Triple &TT = TM->getTargetTriple(); const MCAsmInfo *MAI = TM->getMCAsmInfo(); - addPass(createX86RetpolineThunksPass()); + addPass(createX86IndirectThunksPass()); // Insert extra int3 instructions after trailing call instructions to avoid // issues in the unwinder. |
