diff options
author | Chris Lattner <sabre@nondot.org> | 2002-12-24 00:04:01 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2002-12-24 00:04:01 +0000 |
commit | a32b4055be3947f28c6e0fcf0fc671eb99924c29 (patch) | |
tree | faa431d11d3c05d884893856cb6447293902c108 /llvm/lib/Target/X86/X86TargetMachine.cpp | |
parent | cfcd0603d0e66de159f20d0abfba48a0d65e650f (diff) | |
download | bcm5719-llvm-a32b4055be3947f28c6e0fcf0fc671eb99924c29.tar.gz bcm5719-llvm-a32b4055be3947f28c6e0fcf0fc671eb99924c29.zip |
Changes to allow for a configurable target machine that allows big endian and/or long pointer operation
llvm-svn: 5131
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 0eb71da814a..18656af4138 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -5,11 +5,11 @@ //===----------------------------------------------------------------------===// #include "X86TargetMachine.h" +#include "X86.h" #include "llvm/Transforms/Scalar.h" #include "llvm/Target/TargetMachineImpls.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/PassManager.h" -#include "X86.h" #include "Support/CommandLine.h" #include "Support/Statistic.h" #include <iostream> @@ -17,17 +17,26 @@ namespace { cl::opt<bool> NoLocalRA("no-local-ra", cl::desc("Use Simple RA instead of Local RegAlloc")); + cl::opt<bool> PrintCode("print-machineinstrs", + cl::desc("Print generated machine code")); } // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine // that implements the X86 backend. // -TargetMachine *allocateX86TargetMachine() { return new X86TargetMachine(); } +TargetMachine *allocateX86TargetMachine(unsigned Configuration) { + return new X86TargetMachine(Configuration); +} /// X86TargetMachine ctor - Create an ILP32 architecture model /// -X86TargetMachine::X86TargetMachine() : TargetMachine("X86", 1, 4, 4, 4) { +X86TargetMachine::X86TargetMachine(unsigned Config) + : TargetMachine("X86", + (Config & TM::EndianMask) == TM::LittleEndian, + 1, 4, + (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4, + (Config & TM::PtrSizeMask) == TM::PtrSize64 ? 8 : 4) { } @@ -46,7 +55,8 @@ bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) { // TODO: optional optimizations go here // Print the instruction selected machine code... - DEBUG(PM.add(createMachineFunctionPrinterPass())); + if (PrintCode) + PM.add(createMachineFunctionPrinterPass()); // Perform register allocation to convert to a concrete x86 representation if (NoLocalRA) @@ -58,7 +68,8 @@ bool X86TargetMachine::addPassesToJITCompile(PassManager &PM) { // PM.add(createMachineFunctionPrinterPass()); // Print the register-allocated code - DEBUG(PM.add(createX86CodePrinterPass(*this, std::cerr))); + if (PrintCode) + PM.add(createX86CodePrinterPass(*this, std::cerr)); return false; // success! } |