Still need to support -mcpu=<> or cross compilation will fail. Doh.

llvm-svn: 30764

1 files changed, 16 insertions, 3 deletions

diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index e781d9527c8..b4907b64cf4 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -32,12 +32,19 @@ protected:
     NoMMXSSE, MMX, SSE1, SSE2, SSE3
   };
 
+  enum X863DNowEnum {
+    NoThreeDNow, ThreeDNow, ThreeDNowA
+  };
+
   /// AsmFlavor - Which x86 asm dialect to use.
   AsmWriterFlavorTy AsmFlavor;
 
   /// X86SSELevel - MMX, SSE1, SSE2, SSE3, or none supported.
   X86SSEEnum X86SSELevel;
 
+  /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
+  X863DNowEnum X863DNowLevel;
+
   /// HasX86_64 - True if the processor supports X86-64 instructions.
   bool HasX86_64;
 
@@ -74,9 +81,13 @@ public:
   /// aligned.
   unsigned getMinRepStrSizeThreshold() const { return MinRepStrSizeThreshold; }
  
-  /// DetectSubtargetFeatures - Auto-detect CPU features using CPUID instruction.
-  ///
-  void DetectSubtargetFeatures();
+  /// ParseSubtargetFeatures - Parses features string setting specified 
+  /// subtarget options.  Definition of function is auto generated by tblgen.
+  void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+
+  /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
+  /// instruction.
+  void AutoDetectSubtargetFeatures();
 
   bool is64Bit() const { return Is64Bit; }
 
@@ -84,6 +95,8 @@ public:
   bool hasSSE1() const { return X86SSELevel >= SSE1; }
   bool hasSSE2() const { return X86SSELevel >= SSE2; }
   bool hasSSE3() const { return X86SSELevel >= SSE3; }
+  bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
+  bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
   
   bool isFlavorAtt() const { return AsmFlavor == att; }
   bool isFlavorIntel() const { return AsmFlavor == intel; }