summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86Subtarget.h
diff options
context:
space:
mode:
authorMichael Liao <michael.liao@intel.com>2013-03-28 23:41:26 +0000
committerMichael Liao <michael.liao@intel.com>2013-03-28 23:41:26 +0000
commita486a11dcfaa9f31d78eb52929d8d33c56e9cf60 (patch)
tree20d7f03762c6a2c4509288eb128941908d176577 /llvm/lib/Target/X86/X86Subtarget.h
parent3b602ce5a4a1fc3ace06aa794c78466947012f9c (diff)
downloadbcm5719-llvm-a486a11dcfaa9f31d78eb52929d8d33c56e9cf60.tar.gz
bcm5719-llvm-a486a11dcfaa9f31d78eb52929d8d33c56e9cf60.zip
Add support of RDSEED defined in AVX2 extension
llvm-svn: 178314
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index cac3f579b00..6fbdb1d5f00 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -130,6 +130,9 @@ protected:
/// HasPRFCHW - Processor has PRFCHW instructions.
bool HasPRFCHW;
+ /// HasRDSEED - Processor has RDSEED instructions.
+ bool HasRDSEED;
+
/// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
bool IsBTMemSlow;
@@ -266,6 +269,7 @@ public:
bool hasHLE() const { return HasHLE; }
bool hasADX() const { return HasADX; }
bool hasPRFCHW() const { return HasPRFCHW; }
+ bool hasRDSEED() const { return HasRDSEED; }
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
bool hasVectorUAMem() const { return HasVectorUAMem; }
OpenPOWER on IntegriCloud