summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86Subtarget.h
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2015-08-21 20:17:26 +0000
committerSanjay Patel <spatel@rotateright.com>2015-08-21 20:17:26 +0000
commit9e916dc48def7451c189b1e6efe830ef9f1da803 (patch)
treef286b769e8237c99615b0db55248dd1556ffa96f /llvm/lib/Target/X86/X86Subtarget.h
parent88208840b56ec5ceafd4c3d34a43d22dbba3a611 (diff)
downloadbcm5719-llvm-9e916dc48def7451c189b1e6efe830ef9f1da803.tar.gz
bcm5719-llvm-9e916dc48def7451c189b1e6efe830ef9f1da803.zip
[x86] invert logic for attribute 'FeatureFastUAMem'
This is a 'no functional change intended' patch. It removes one FIXME, but adds several more. Motivation: the FeatureFastUAMem attribute may be too general. It is used to determine if any sized misaligned memory access under 32-bytes is 'fast'. From the added FIXME comments, however, you can see that we're not consistent about this. Changing the name of the attribute makes it clearer to see the logic holes. Changing this to a 'slow' attribute also means we don't have to add an explicit 'fast' attribute to new chips; fast unaligned accesses have been standard for several generations of CPUs now. Differential Revision: http://reviews.llvm.org/D12154 llvm-svn: 245729
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 14e0088bc9b..d5d00277e5b 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -146,10 +146,10 @@ protected:
/// True if SHLD instructions are slow.
bool IsSHLDSlow;
- /// True if unaligned memory access is fast.
- bool IsUAMemFast;
+ /// True if unaligned memory accesses of 16-bytes or smaller are slow.
+ bool IsUAMemUnder32Slow;
- /// True if unaligned 32-byte memory accesses are slow.
+ /// True if unaligned memory accesses of 32-bytes are slow.
bool IsUAMem32Slow;
/// True if SSE operations can have unaligned memory operands.
@@ -357,7 +357,7 @@ public:
bool hasRDSEED() const { return HasRDSEED; }
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isSHLDSlow() const { return IsSHLDSlow; }
- bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
+ bool isUnalignedMemUnder32Slow() const { return IsUAMemUnder32Slow; }
bool isUnalignedMem32Slow() const { return IsUAMem32Slow; }
bool hasSSEUnalignedMem() const { return HasSSEUnalignedMem; }
bool hasCmpxchg16b() const { return HasCmpxchg16b; }
OpenPOWER on IntegriCloud