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authorCraig Topper <craig.topper@intel.com>2019-08-29 18:09:02 +0000
committerCraig Topper <craig.topper@intel.com>2019-08-29 18:09:02 +0000
commit5a43fdd3139640116fc18d82cb1b6d2788def156 (patch)
treec684171e093f6ca34306a690b53bb1e525d01e72 /llvm/lib/Target/X86/X86Subtarget.h
parent093ebf927569a7d79991716cc786aa2c9250d012 (diff)
downloadbcm5719-llvm-5a43fdd3139640116fc18d82cb1b6d2788def156.tar.gz
bcm5719-llvm-5a43fdd3139640116fc18d82cb1b6d2788def156.zip
[X86] Remove what little support we had for MPX
-Deprecate -mmpx and -mno-mpx command line options -Remove CPUID detection of mpx for -march=native -Remove MPX from all CPUs -Remove MPX preprocessor define I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything. gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX Differential Revision: https://reviews.llvm.org/D66669 llvm-svn: 370393
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index 9f73a821da2..46e777da15f 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -365,8 +365,8 @@ protected:
/// Processor has AVX-512 vp2intersect instructions
bool HasVP2INTERSECT = false;
- /// Processor supports MPX - Memory Protection Extensions
- bool HasMPX = false;
+ /// Deprecated flag for MPX instructions.
+ bool DeprecatedHasMPX = false;
/// Processor supports CET SHSTK - Control-Flow Enforcement Technology
/// using Shadow Stack
@@ -684,7 +684,6 @@ public:
bool hasBF16() const { return HasBF16; }
bool hasVP2INTERSECT() const { return HasVP2INTERSECT; }
bool hasBITALG() const { return HasBITALG; }
- bool hasMPX() const { return HasMPX; }
bool hasSHSTK() const { return HasSHSTK; }
bool hasCLFLUSHOPT() const { return HasCLFLUSHOPT; }
bool hasCLWB() const { return HasCLWB; }
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