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author | Pengfei Wang <pengfei.wang@intel.com> | 2019-05-30 03:59:16 +0000 |
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committer | Pengfei Wang <pengfei.wang@intel.com> | 2019-05-30 03:59:16 +0000 |
commit | 1f67d9427931f61585d2392c3b958cd2b459af54 (patch) | |
tree | 4505af926e68c98cc0fcff87dc7ed8714f66eec1 /llvm/lib/Target/X86/X86Subtarget.h | |
parent | 2632ebb551db67801d41ee8e3ab931f639180a94 (diff) | |
download | bcm5719-llvm-1f67d9427931f61585d2392c3b958cd2b459af54.tar.gz bcm5719-llvm-1f67d9427931f61585d2392c3b958cd2b459af54.zip |
[X86] Add ENQCMD instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.
Patch by Tianqing Wang (tianqing)
Differential Revision: https://reviews.llvm.org/D62281
llvm-svn: 362053
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r-- | llvm/lib/Target/X86/X86Subtarget.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h index 43d4ab71318..6fefe23182f 100644 --- a/llvm/lib/Target/X86/X86Subtarget.h +++ b/llvm/lib/Target/X86/X86Subtarget.h @@ -356,6 +356,9 @@ protected: /// Processor has AVX-512 bfloat16 floating-point extensions bool HasBF16 = false; + /// Processor supports ENQCMD instructions + bool HasENQCMD = false; + /// Processor has AVX-512 Bit Algorithms instructions bool HasBITALG = false; @@ -688,6 +691,7 @@ public: bool hasSGX() const { return HasSGX; } bool threewayBranchProfitable() const { return ThreewayBranchProfitable; } bool hasINVPCID() const { return HasINVPCID; } + bool hasENQCMD() const { return HasENQCMD; } bool useRetpolineIndirectCalls() const { return UseRetpolineIndirectCalls; } bool useRetpolineIndirectBranches() const { return UseRetpolineIndirectBranches; |