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author | Evan Cheng <evan.cheng@apple.com> | 2012-02-07 22:50:41 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2012-02-07 22:50:41 +0000 |
commit | 1b81fddd654340a06fb199a13e71b27fd23e8064 (patch) | |
tree | d1a2e36b4872d1badef141a08c3a06b165a07726 /llvm/lib/Target/X86/X86Subtarget.h | |
parent | ea9b81b4c6a3d073157c3f6d4a8329f266cba712 (diff) | |
download | bcm5719-llvm-1b81fddd654340a06fb199a13e71b27fd23e8064.tar.gz bcm5719-llvm-1b81fddd654340a06fb199a13e71b27fd23e8064.zip |
Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.
llvm-svn: 150008
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r-- | llvm/lib/Target/X86/X86Subtarget.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h index f930806be6c..9e8b3f98d8a 100644 --- a/llvm/lib/Target/X86/X86Subtarget.h +++ b/llvm/lib/Target/X86/X86Subtarget.h @@ -132,6 +132,10 @@ protected: /// this is true for most x86-64 chips, but not the first AMD chips. bool HasCmpxchg16b; + /// UseLeaForSP - True if the LEA instruction should be used for adjusting + /// the stack pointer. This is an optimization for Intel Atom processors. + bool UseLeaForSP; + /// PostRAScheduler - True if using post-register-allocation scheduler. bool PostRAScheduler; @@ -214,6 +218,7 @@ public: bool isUnalignedMemAccessFast() const { return IsUAMemFast; } bool hasVectorUAMem() const { return HasVectorUAMem; } bool hasCmpxchg16b() const { return HasCmpxchg16b; } + bool useLeaForSP() const { return UseLeaForSP; } bool isAtom() const { return X86ProcFamily == IntelAtom; } |