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authorEvan Cheng <evan.cheng@apple.com>2009-10-16 21:06:15 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-10-16 21:06:15 +0000
commit007ceb46039daf322651ab02c26fd8993bad2144 (patch)
tree925221a321dbcd5cec528f0a4404256314862b45 /llvm/lib/Target/X86/X86Subtarget.h
parent5a2863856013abfc56fd884810567a7177917c2c (diff)
downloadbcm5719-llvm-007ceb46039daf322651ab02c26fd8993bad2144.tar.gz
bcm5719-llvm-007ceb46039daf322651ab02c26fd8993bad2144.zip
Change createPostRAScheduler so it can be turned off at llc -O1.
llvm-svn: 84273
Diffstat (limited to 'llvm/lib/Target/X86/X86Subtarget.h')
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86Subtarget.h b/llvm/lib/Target/X86/X86Subtarget.h
index cb14e3c9658..16a2f1023c9 100644
--- a/llvm/lib/Target/X86/X86Subtarget.h
+++ b/llvm/lib/Target/X86/X86Subtarget.h
@@ -215,6 +215,13 @@ public:
/// indicating the number of scheduling cycles of backscheduling that
/// should be attempted.
unsigned getSpecialAddressLatency() const;
+
+ /// enablePostRAScheduler - X86 target is enabling post-alloc scheduling
+ /// at 'More' optimization level.
+ bool enablePostRAScheduler(CodeGenOpt::Level OptLevel) const {
+ // FIXME: This causes llvm to miscompile itself on i386. :-(
+ return false/*OptLevel >= CodeGenOpt::Default*/;
+ }
};
} // End llvm namespace
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