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authorQuentin Colombet <qcolombet@apple.com>2016-05-10 01:09:14 +0000
committerQuentin Colombet <qcolombet@apple.com>2016-05-10 01:09:14 +0000
commitee5f36bd54fc791745f3f23b68adb83aca6123fd (patch)
treea88106880035e7d0c7235e8ad29dc4e48a797555 /llvm/lib/Target/X86/X86RegisterInfo.cpp
parent3b30b7eef65cd6d5d491b94b8ab751c84aa8b39e (diff)
downloadbcm5719-llvm-ee5f36bd54fc791745f3f23b68adb83aca6123fd.tar.gz
bcm5719-llvm-ee5f36bd54fc791745f3f23b68adb83aca6123fd.zip
[X86][AVX512] Use the proper load/store for AVX512 registers.
When loading or storing AVX512 registers we were not using the AVX512 variant of the load and store for VR128 and VR256 like registers. Thus, we ended up with the wrong encoding and actually were dropping the high bits of the instruction. The result was that we load or store the wrong register. The effect is visible only when we emit the object file directly and disassemble it. Then, the output of the disassembler does not match the assembly input. This is related to llvm.org/PR27481. llvm-svn: 269001
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index cb4170cc623..7b1059ee32d 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -294,10 +294,11 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
return CSR_64_SaveList;
case CallingConv::X86_INTR:
if (Is64Bit) {
+ if (HasAVX512)
+ return CSR_64_AllRegs_AVX512_SaveList;
if (HasAVX)
return CSR_64_AllRegs_AVX_SaveList;
- else
- return CSR_64_AllRegs_SaveList;
+ return CSR_64_AllRegs_SaveList;
} else {
if (HasSSE)
return CSR_32_AllRegs_SSE_SaveList;
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