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authorDale Johannesen <dalej@apple.com>2007-07-03 00:53:03 +0000
committerDale Johannesen <dalej@apple.com>2007-07-03 00:53:03 +0000
commita2b3c175db7055b6b6827bbfc0fd28ab26fc8dea (patch)
treedf3e92166477b29fd694653f720b2baccda7c1ed /llvm/lib/Target/X86/X86RegisterInfo.cpp
parent5518345f256a52d37e767db57707b5e9464a0032 (diff)
downloadbcm5719-llvm-a2b3c175db7055b6b6827bbfc0fd28ab26fc8dea.tar.gz
bcm5719-llvm-a2b3c175db7055b6b6827bbfc0fd28ab26fc8dea.zip
Fix for PR 1505 (and 1489). Rewrite X87 register
model to include f32 variants. Some factoring improvments forthcoming. llvm-svn: 37847
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp14
1 files changed, 10 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 30d029f6ca1..23970ed59cc 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -82,8 +82,10 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
Opc = X86::MOV32_mr;
} else if (RC == &X86::GR16_RegClass) {
Opc = X86::MOV16_mr;
- } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
+ } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpST64m;
+ } else if (RC == &X86::RFP32RegClass) {
+ Opc = X86::FpST32m;
} else if (RC == &X86::FR32RegClass) {
Opc = X86::MOVSSmr;
} else if (RC == &X86::FR64RegClass) {
@@ -117,8 +119,10 @@ void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
Opc = X86::MOV32_rm;
} else if (RC == &X86::GR16_RegClass) {
Opc = X86::MOV16_rm;
- } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
+ } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpLD64m;
+ } else if (RC == &X86::RFP32RegClass) {
+ Opc = X86::FpLD32m;
} else if (RC == &X86::FR32RegClass) {
Opc = X86::MOVSSrm;
} else if (RC == &X86::FR64RegClass) {
@@ -151,8 +155,10 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
Opc = X86::MOV32_rr;
} else if (RC == &X86::GR16_RegClass) {
Opc = X86::MOV16_rr;
- } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
- Opc = X86::FpMOV;
+ } else if (RC == &X86::RFP32RegClass) {
+ Opc = X86::FpMOV3232;
+ } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
+ Opc = X86::FpMOV6464;
} else if (RC == &X86::FR32RegClass) {
Opc = X86::FsMOVAPSrr;
} else if (RC == &X86::FR64RegClass) {
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