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| author | Evan Cheng <evan.cheng@apple.com> | 2006-11-10 08:43:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-10 08:43:01 +0000 |
| commit | 8c9c6d71ed626d8056e19d1d17416a667bf3d6dd (patch) | |
| tree | c358f1f1df8d4079df9b95cf86dbc4ac9616abd7 /llvm/lib/Target/X86/X86RegisterInfo.cpp | |
| parent | f5bebe83a553bf1c94c6f07896a5f10d73c22c16 (diff) | |
| download | bcm5719-llvm-8c9c6d71ed626d8056e19d1d17416a667bf3d6dd.tar.gz bcm5719-llvm-8c9c6d71ed626d8056e19d1d17416a667bf3d6dd.zip | |
Add implicit def / use operands to MachineInstr.
llvm-svn: 31633
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp index 6363f122087..74d446132b5 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -196,7 +196,7 @@ static MachineInstr *FuseInst(unsigned Opcode, unsigned OpNo, assert(MO.isReg() && "Expected to fold into reg operand!"); MIB = addFrameReference(MIB, FrameIndex); } else if (MO.isReg()) - MIB = MIB.addReg(MO.getReg(), MO.isDef()); + MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit()); else if (MO.isImm()) MIB = MIB.addImm(MO.getImm()); else if (MO.isGlobalAddress()) |
