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| author | Evan Cheng <evan.cheng@apple.com> | 2006-02-16 22:45:17 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-02-16 22:45:17 +0000 |
| commit | 24c461b51ee67ff44ccc13444716b1aecaedc4c5 (patch) | |
| tree | 21b2bd8ca5ce9951342844b477361f5665a8e57f /llvm/lib/Target/X86/X86RegisterInfo.cpp | |
| parent | 3f99628939823be97fb31aeef35b5dbb61888677 (diff) | |
| download | bcm5719-llvm-24c461b51ee67ff44ccc13444716b1aecaedc4c5.tar.gz bcm5719-llvm-24c461b51ee67ff44ccc13444716b1aecaedc4c5.zip | |
1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
spill / restore FsMOVAPSrr and FsMOVAPDrr.
llvm-svn: 26241
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp index cf31167061d..2ffa4c7412b 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp @@ -114,9 +114,9 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) { Opc = X86::FpMOV; } else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) { - Opc = X86::MOVAPSrr; + Opc = X86::FsMOVAPSrr; } else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) { - Opc = X86::MOVAPDrr; + Opc = X86::FsMOVAPDrr; } else { assert(0 && "Unknown regclass"); abort(); @@ -313,6 +313,9 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI, case X86::CMP8ri: return MakeMIInst(X86::CMP8mi , FrameIndex, MI); case X86::CMP16ri: return MakeMIInst(X86::CMP16mi, FrameIndex, MI); case X86::CMP32ri: return MakeMIInst(X86::CMP32mi, FrameIndex, MI); + // Alias scalar SSE instructions + case X86::FsMOVAPSrr: return MakeMRInst(X86::MOVSSmr, FrameIndex, MI); + case X86::FsMOVAPDrr: return MakeMRInst(X86::MOVSDmr, FrameIndex, MI); // Scalar SSE instructions case X86::MOVSSrr: return MakeMRInst(X86::MOVSSmr, FrameIndex, MI); case X86::MOVSDrr: return MakeMRInst(X86::MOVSDmr, FrameIndex, MI); @@ -393,6 +396,9 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI, case X86::MOVZX16rr8:return MakeRMInst(X86::MOVZX16rm8 , FrameIndex, MI); case X86::MOVZX32rr8:return MakeRMInst(X86::MOVZX32rm8, FrameIndex, MI); case X86::MOVZX32rr16:return MakeRMInst(X86::MOVZX32rm16, FrameIndex, MI); + // Alias scalar SSE instructions + case X86::FsMOVAPSrr:return MakeRMInst(X86::MOVSSrm, FrameIndex, MI); + case X86::FsMOVAPDrr:return MakeRMInst(X86::MOVSDrm, FrameIndex, MI); // Scalar SSE instructions case X86::MOVSSrr: return MakeRMInst(X86::MOVSSrm, FrameIndex, MI); case X86::MOVSDrr: return MakeRMInst(X86::MOVSDrm, FrameIndex, MI); |
