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| author | Igor Breger <igor.breger@intel.com> | 2017-02-22 12:25:09 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2017-02-22 12:25:09 +0000 |
| commit | f7359d893af318deca46b85f2d6c0f0f533783c7 (patch) | |
| tree | 08b92e8cbc965238c1b4465f9e74c722f0b3860e /llvm/lib/Target/X86/X86RegisterBankInfo.cpp | |
| parent | a2fc1e0cc886df429cde9e6ac59ce3fad4419461 (diff) | |
| download | bcm5719-llvm-f7359d893af318deca46b85f2d6c0f0f533783c7.tar.gz bcm5719-llvm-f7359d893af318deca46b85f2d6c0f0f533783c7.zip | |
[X86][GlobalISel] Initial implementation , select G_ADD gpr, gpr
Summary: Initial implementation for X86InstructionSelector. Handle selection COPY and G_ADD/G_SUB gpr, gpr .
Reviewers: qcolombet, rovka, zvi, ab
Reviewed By: rovka
Subscribers: mgorny, dberris, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D29816
llvm-svn: 295824
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp index e94c5caedac..626e7ef4bed 100644 --- a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp @@ -111,6 +111,7 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { switch (Opc) { case TargetOpcode::G_ADD: + case TargetOpcode::G_SUB: return getOperandsMapping(MI, false); break; default: |
