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| author | Igor Breger <igor.breger@intel.com> | 2017-09-17 08:08:13 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2017-09-17 08:08:13 +0000 |
| commit | 21200ed7afbaf3c295658a61b579878ce91daa2f (patch) | |
| tree | f4f6dc81e617bdc448a95d0c46bc491ad5f3e253 /llvm/lib/Target/X86/X86RegisterBankInfo.cpp | |
| parent | bef5d24449f50015316371f502daefdb9dfc9d2f (diff) | |
| download | bcm5719-llvm-21200ed7afbaf3c295658a61b579878ce91daa2f.tar.gz bcm5719-llvm-21200ed7afbaf3c295658a61b579878ce91daa2f.zip | |
[GlobalISel][X86] G_FCONSTANT support.
Summary: G_FCONSTANT support, port the implementation from X86FastIsel.
Reviewers: zvi, delena, guyblank
Reviewed By: delena
Subscribers: rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D37734
llvm-svn: 313478
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp index 3fc837478ca..8447e8b7725 100644 --- a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp @@ -186,6 +186,7 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { switch (Opc) { case TargetOpcode::G_FPEXT: + case TargetOpcode::G_FCONSTANT: // Instruction having only floating-point operands (all scalars in VECRReg) getInstrPartialMappingIdxs(MI, MRI, /* isFP */ true, OpRegBankIdx); break; |
